Custom LattePanda Mu Carrier Board
A custom-designed carrier board for the LattePanda Mu x86 compute module (Intel N100), featuring tailored I/O, power delivery, and high-speed interfaces including PCIe 3.0, USB 3.2, HDMI 2.1, and Gigabit Ethernet.
Overview
The LattePanda Mu is a compact x86 compute module powered by an Intel N100 processor, featuring a 260-pin SO-DIMM edge connector that exposes PCIe 3.0, USB 3.2, HDMI 2.1, SATA, GPIO, and more. This project involves designing a custom carrier board from scratch to break out and utilize these interfaces for a specific application.
Rather than using the off-the-shelf evaluation carrier board, the goal is to design a purpose-built, compact carrier that demonstrates end-to-end ECAD skills — from schematic capture through PCB layout, fabrication, and bring-up.
High-Level Architecture
| Block | Description |
|---|---|
| Compute Module | LattePanda Mu (Intel N100, 8GB LPDDR5, 64GB eMMC) via 260-pin SO-DIMM socket |
| Power Supply | 12V barrel jack input → multi-rail DC-DC (5V, 3.3V, 1.8V) with sequencing and soft-start |
| Display | HDMI 2.1 output with ESD protection and impedance-controlled routing |
| USB | 2× USB 3.2 Type-A, 1× USB-C (data + PD sink) with re-driver ICs |
| Storage | M.2 M-key slot (NVMe SSD via PCIe 3.0 x4) |
| Networking | Gigabit Ethernet (Intel I226-V) with onboard magnetics |
| Expansion | 40-pin GPIO header for custom peripherals, I2C, SPI, UART |
Execution Plan
- Phase 1 — Schematic capture in Altium Designer, starting with power tree and high-speed interfaces
- Phase 2 — 6-layer PCB layout with controlled impedance stackup for PCIe/USB/HDMI differential pairs
- Phase 3 — Design review, DRC/ERC, and generate Gerbers + BOM for fabrication (JLCPCB/PCBWay)
- Phase 4 — Board assembly (reflow + hand soldering for fine-pitch components)
- Phase 5 — Bring-up and validation: power rail verification, signal integrity checks with oscilloscope, boot test
Key Design Challenges
- High-speed signal integrity — length matching and impedance control for PCIe 3.0 and USB 3.2 differential pairs
- Power sequencing — proper voltage rail startup order required by the Intel N100 platform
- HSIO coupling capacitors — the LattePanda Mu does not include series AC-coupling caps on HSIO pins, so these must be placed on the carrier board
- Thermal management — adequate copper pours and thermal vias to handle the N100’s TDP
- Compact form factor — targeting a board size suitable for embedded and edge computing applications
Tools
- Altium Designer — schematic capture and PCB layout
- LTspice — power supply simulation and loop stability analysis
- Saturn PCB Toolkit — impedance and via current calculations
- JLCPCB / PCBWay — PCB fabrication and SMT assembly